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[VHDL-FPGA-Verilog] xapp368

Description: 可编程器件厂商Xilinx的手持式逻辑分析仪的逻辑设计，包括完整的可用于Xlinx器件的硬件code，以及用来接口的C代码-makers Xilinx programmable devices, handheld logic of the logic analyzer design, including complete Xlinx device can be used for the hardware code, and to interface C code
Platform: | Size: 552960 | Author: 宋云成 | Hits:

[Software Engineering] Virtex.files

Description: 在FPGA系统设计中，要达到性能最大化需要平衡具有混合性能效率的元器件，包括逻辑构造(fabric)、片上存储器、DSP和I/O带宽。在本文中，我将向你解释怎样能在追求更高系统级性能的过程中受益于Xilinx® 的Virtex™ -5 FPGA构建模块，特别是新的ExpressFabric™ 技术。以针对逻辑和算术功能的量化预期性能改进为例，我将探究ExpressFabric架构的主要功能。基于实际客户设计的基准将说明Virtex-5ExpressFabric技术性能平均比前一代Virtex-4 FPGA要高30％。-in FPGA system design to achieve maximum performance with the need to balance the efficiency of the mixed performance components including logical structure (fabric), on-chip memory, DSP and I/O bandwidth. In this article, I will explain how you can in the pursuit of higher system-level performance of the process to benefit from Xilinx
Platform: | Size: 97280 | Author: yaoming | Hits:

[DSP program] DTK-IO

Description: 数字I/O实验主要完成的功能：在此实验中，SEED-DEC5416 首选进行初始化，包括对外设 UART、本身频率的设定及一些状态区的初始化。然后等待 SEED-MMI5402 发送命令；SEED－DEC5416 响应交通灯自动模式、交通灯手动手动模式、交通灯东西通、交通灯南北通、及交通灯的禁行与夜间模式的操作命令。同时还响应，对 SEED-DEC5416 的复位及两个单元之间的通讯故障。 -Digital I/O completion of the experiment the main features: In this experiment, SEED-DEC5416 preferred to initialize, including peripherals UART, their frequency settings and some of the initialization state of the district. SEED-MMI5402 and then wait to send commands SEED-DEC5416 automatic mode in response to traffic lights, traffic lights manual manual mode, the traffic light east-west pass, pass traffic lights north and south, and traffic lights at night and cut-line mode command. At the same time, also responded to the SEED-DEC5416 reset and communication between two modules fault.
Platform: | Size: 222208 | Author: sylivian | Hits:

[SCM] pingpufx

Description:
Platform: | Size: 382976 | Author: 郑坤 | Hits:

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[VHDL-FPGA-Verilog] xapp368

[Software Engineering] Virtex.files

[DSP program] DTK-IO

[SCM] pingpufx

[VHDL-FPGA-Verilog] Xilinx-verilog

[VHDL-FPGA-Verilog] 2.CLK1HZ

[Linux-Unix] gpio-xilinx

[Linux-Unix] spi-xilinx

[Linux-Unix] xilinx-xadc

[Linux-Unix] xilinx-xadc-core

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[Linux-Unix] xilinx-xadc

[Linux-Unix] pcie-xilinx

[Linux-Unix] xilinx-xadc-events

[Linux driver] Xilinx-NIC-Driver

[Linux driver] Xilinx-FPGA-PCIE-driver

[Linux-Unix] buttons

[VHDL-FPGA-Verilog] PLL

[Other] ug873-design-files (1)

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